Title | Flash memory structure and method of manufacturing the same |
Year | 2018 |
Country | TW、US |
Inventor | ZHENG, CHUN-HU |
Co-inventor | CHANG, CHUN YEN; CHIU, YU CHIEN |
Cert. No. | I621215、US10,515,980B2 |
Introduction | A flash memory structure and a method of making the same are provided. The flash memory structure comprises a substrate, a source, a drain, a tunnel isolation layer, a ferroelectric-charge-trapping layer, at least one blocking isolation layer and at least one gate. The substrate is made of a semiconductive material. The source is formed on the substrate. The drain is formed on the substrate and spaced apart from the source. The tunnel isolation layer is formed on the substrate. The ferroelectric-charge-trapping layer is formed on the tunnel isolation layer and contains a charge-trapping layer and a ferroelectric negative-capacitance effect layer. The at least one blocking isolation layer is formed on the ferroelectric-charge-trapping layer. The at least one gate is formed on the blocking isolation layer. The ferroelectric negative-capacitance effect layer is made of a material with the ferroelectric negative-capacitance effect. |
Validity | 2037/12/26 |
Domain | Electronic_Engineering |
View count:
113